Burn-in & Reliability Qualification
Reliability qualification demonstrates the fitness of a microelectronic product or IC for use in the field and helps our clients better understand the fundamental wear-out mechanisms, detect design marginality combined with parameter drift, and determine failure rates due to latent manufacturing defects. Atomic Echo Labs provides stress-based reliability qualification and knowledge-based reliability qualification methodologies based on industry standards. These reliability testing techniques include High Temperature Operating Life Test (HTOL), thermal shock, preconditioning, temperature humidity bias, Highly Accelerated Temperature and Humidity Stress Test (HAST), and more. We can customize the test conditions to meet your IC qualification needs.
We also have an in-house PCB design and assembly services team for any burn-in boards, HAST boards or custom fixtures that may be required. Atomic Echo Labs has optimized our services, so no matter if you need maximum value and fast response or complete outsourced services, Atomic Echo Labs experienced reliability engineers can create qualification plans and perform testing to meet your requirements with strict adherence to applicable JEDEC and MIL-STD specifications.
Our burn-in and reliability qualification lab is one of the finest in the country, with over 75 chambers & ovens, tight ESD safety controls, routine audits, and a dedicated engineering staff to provide you with all of the burn-in, package qualification, process qualification and other reliability data you need.
Burn-in and reliability qualification services from Atomic Echo Labs.
Our lab service procedures are ISO 17025 accredited and DSCC certified. We follow industry standards, such as JEDEC, Mil-Std, AEC, as well as customer specific requirements. All equipment uses N.I.S.T. traceable tooling and monitored, calibrated profiles.
Stress-based qualification methodology provides a broad approach to identifying IC failure mechanisms and is a powerful tool to help engineers identify devices that may fail under normal use conditions. Thermal cycling and bias/humidity stress testing are conditions which many products experience, and test conditions are designed to accelerate failures compared to field conditions.
Knowledge-based qualification methodology is based upon detecting and understanding specific failure mechanisms. When a failure mechanism is known, accelerated testing can be designed to detect those failures prior to placing a product in the field.
Our testing methods include:
Moisture/Reflow Sensitivity Classification
This test is used to determine the classification level of non-hermetic solid state surface mount devices (SMDs) that are sensitive to moisture-induced stress, so that they can be properly packaged, stored, and handled to avoid damage during assembly, solder reflow attachment, and/or repair operations. This will determine the classification level that should be used in Preconditioning. Applicable Spec: IPC/JEDEC J-STD-020
Preconditioning is to measure the resistance of non-hermetic surface mount devices to worst-case moisture absorption, followed by one cycle of the soldering process and two cycles of rework. A statistical sample of parts is inspected with an acoustic microscope before and after preconditioning. Before they undergo the temperature humidity bias test, the temperature cycle test, the thermal shock test, the pressure cooker test or the highly-accelerated temperature and humidity stress test, surface mount devices are subjected to preconditioning and must later pass a final electrical test. Applicable Spec: JESD22-A113
HTOL – High Temperature Operating Life Test
High temperature operating life (HTOL) test is to determine the reliability of products by accelerating thermally activated failure mechanisms. Customer parts are subjected to elevated temperatures under biased operating conditions. Typically, dynamic signals are applied to the devices under stress. The typical Vcc is the maximum operating voltage. The test is used to predict long term failure rates. All test samples must pass a final electrical test prior to HTOL testing. Applicable Specs: JESD22-A108, MIL-STD-883 Method 1005.8, EIAJ-ED4701-D323.
HTSL – High Temperature Storage Life Test
The high-temperature storage life test measures device resistance to a high-temperature environment that simulates a storage environment. The stress temperature is typically set to 125°C or 150°C to accelerate the effect of temperature on the test samples. In the test, no voltage bias is applied to the devices. Applicable Specs: JESD22-A103, MIL-STD-883 Method 1008
Temperature cycle testing accelerates fatigue failures within a specific die and packaging system. Typical failure mechanisms include die cracking, package cracking, wire bond failure, and first or second level interconnect solder fatigue. The temperature cycling is done in one, two or three chamber systems that control the air temperature and ramp rate. Ten different temperature conditions and four different soak modes are specified, and the combination of temperature condition and soak mode depends on customer requirements. Applicable Specs: JESD22-A104, MIL-STD-883 Method 1010.7
Thermal shock testing is similar to temperature cycle testing, except that in thermal shock tests, an additional stress is provided: a sudden change in temperature due to a rapid transfer time. Thus, the test can detect failure mechanisms caused by temperature transients and temperature gradients. The system has two inert fluorocarbon baths that are maintained at the temperature extremes described in the spec. Four different combinations of bath temperatures and dwell times are specified, and Atomic Echo Labs engineers can help you choose the conditions that are applicable for your part. Applicable Specs: JESD22-A106, MIL-STD-883 Method 1011.9
2nd Level Interconnect Testing
Air-to-air temperature cycling of customer supplied test vehicles is performed to determine the performance and reliability of 2nd-level solder joints. This type of testing establishes different levels of performance and reliability of the solder attachments of surface mount devices to rigid, flexible and rigid-flex circuit structures. Applicable Specs: IPC 970.
Temperature Humidity Bias
The temperature-humidity-bias test is an environmental test designed to accelerate corrosion and dendritic growth. This is an alternative to the High Temperature and Humidity Stress Test (HAST). Although bias is applied, the part is typically put in a low power state to accelerate the failure mechanisms of interest while minimizing self-heating.
The duration of the test is 1008 hours, with readouts (final electrical tests) at 168 hours and 504 hours during the test. The stress temperature is 85°C, and the relative humidity is 85%. Testing should be performed no later than 48 hours after the end of ramp-down.
The bias voltage is typically the maximum operating voltage. Two kinds of bias may be applied depending on which one is more severe: continuous bias or cycled bias.
Samples of surface mount devices must undergo preconditioning and pass a final electrical test prior the THB test.
We have temperature-humidity test chambers that meet the requirements called out in the JESD22-A100D standard, including the temperature, relative humidity, and ramp conditions. Please contact us to learn more or submit your product for testing. Applicable Specs: JESD22-A100D, EIAJ-IC-121-17.
HAST – Highly Accelerated Temperature and Humidity Stress Test
The highly accelerated temperature and humidity stress test (HAST) accelerates the same failure mechanisms as the 85°C/85% relative humidity test. The typical test conditions are 130°C/85% relative humidity, under pressure, and non-condensing. The test accelerates the penetration of moisture through the external protective material (encapsulated or seal) or along the interface between the external protective material and the metallic conductor, which pass through it. Samples of surface mount devices are subjected to preconditioning and a final electrical test prior to the highly accelerated temperature and humidity stress test. Applicable Specs: JESD22-A110 (biased), JESD22-A118 (unbiased).
Autoclave or Pressure Cooker Test
The Autoclave or pressure cooker test for ICs is an environmental test that measures a samples resistance to moisture penetration. It is an unbiased highly accelerated test that employs conditions of pressure, humidity and temperature to force moisture into the package. The test conditions are 121°C/100% relative humidity, under pressure, with moisture condensation.
Samples of surface mount devices are subjected to preconditioning and a final electrical test prior to the pressure cooker test. After the pressure cooker test, the leads of the test samples can be cleaned before the final electrical test. Testing should be performed no later than 48 hours after the end of ramp-down.
This test is typically used to evaluate new IC packages or when changes have been made to the materials of the package. The autoclave test helps uncover weaknesses in the package such as delamination or metallization corrosion. The purpose of the unbiased autoclave test is to evaluate the moisture resistance of non-hermetic IC packages and identify failures inside the package.
Our Autoclave chamber meets the JESD22-102 standards for a pressure chamber that can maintain a specified temperature and relative humidity. Although 96 hours is typical for this test, conditions can range from 24 hours (Condition A) through 336 hours (Condition F).
Other tests that are part of reliability qualification can include: preconditioning, HTOL, HTSL, temperature cycling and thermal shock. Applicable Specs: JESD22-A102, EIAJ-IC-121-1.
Atomic Echo Labs conducts a variety of mechanical tests on product packages to evaluate robustness. These tests include:
- Physical dimensions (Method B100)
- Mark permanency
- Lead integrity (Method B105)
- Solderability (Method B102)
- Resistance to soldering heat (Method B106 — Conditions A and B)
- Resistance to solvents (Method B107)
- Die shear / bond strength
- Mechanical shock (Method B104)
- Vibration, variable frequency (Method B103)
Hermetic Package Testing
Atomic Echo Labs performs both fine leak and gross leak testing of packages. Seal integrity testing is crucial for hermetic packages in military, space, and commercial applications. A loss of hermeticity is a reliability concern and will allow moisture and contaminants to enter the package cavity shortening device lifetime.
Both Gross Leak and Fine Leak testing are performed per MIL-STD 883.
CSP Reliability Qualification
System miniaturization, especially in consumer electronics market, is driving the development of advanced packaging technologies to accommodate products that are thinner, smaller, and consume less power. This has increased the use of Chip Scale Packages (CSPs), which are essentially the same size as the die. CSP substrates are also getting thinner to support the electronics they go inside.
Unfortunately, the size advantages that make CSPs so attractive also make them fragile and susceptible to damage during handling. This can result in chipping, cracking and ball damage from handling or socketing.
In general, the CSP reliability qualification process must address four key issues:
- Incoming and outgoing quality control (IQC/OQC)
- Unbiased stress testing
Atomic Echo Labs has developed the solution to these challenges using a combination of a) specialized processes, b) carriers and other custom fixtures as an alternative to sockets and daughter cards, when needed, and c) operator training covering all aspects of the qualification process.